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Design & Sensitivity Analysis

Thermal Sensitivity Analysis of 3D IC Face-to-Back Stacking Using Foundation Models for Physics

Hardik Kabaria, Sheik Dawood Beer Mohideen, John L. Davenport, Balaji Cherukuri, Joseph G. Kocheemoolayil, Nimish Patil, Sarah Osentoski, Adrian J. Lew

December 5, 2025

A technical paper on using foundation models for physics to evaluate material-level thermal sensitivity in 3D stacked chip packages and identify the highest-impact levers for thermal mitigation.


Abstract

As semiconductor devices push toward higher integration densities and 3D stacking, thermal management has emerged as a critical design bottleneck. This work presents how peak and average temperatures depend on the thermal conductivity of selected materials in individual layers for a 3D stacked chip package, and identify the thermal interface material (TIM) as the dominant lever for thermal mitigation, with BEOL dielectrics playing a secondary role and hybrid bonding layers having minimal influence. These insights provide clear guidance for material development priorities and design tradeoffs. These simulations were performed using Vinci-Thermal©. This software reduced manual work by directly ingesting OASIS/GDS/MCM files and automating meshing. We performed full-package thermal simulations of face-to-back stacks with nanometer-scale resolution. Its physics-grounded AI models guarantee accuracy and convergence without additional training, enabling iterative co-optimization of materials, layouts, and power profiles. This allowed us to run the 9101 simulations needed to perform this study in a short amount of time.


What You’ll Learn

  • Why thermal management is a growing bottleneck for 3D ICs and face-to-back stacking
  • How material-level thermal conductivity changes affect peak and average package temperatures
  • Why thermal interface material can be the highest-impact lever for reducing thermal risk
  • How full-package thermal simulation can support material development priorities and design tradeoffs
  • How Vinci-Thermal automates file ingestion, meshing, convergence, and large-scale sensitivity analysis without additional model training

Asset Details

Type: Technical paper

Title: Thermal Sensitivity Analysis of 3D IC Face-to-Back Stacking Using Foundation Models for Physics

Authors: Hardik Kabaria, Sheik Dawood Beer Mohideen, John L. Davenport, Balaji Cherukuri, Joseph Kocheemoolayil, Nimish Patil, Sarah Osentoski, William Stark, Adrian J. Lew

Organization: Vinci4D.ai Inc.

Topic: 3D IC thermal management, face-to-back stacking, material sensitivity analysis, BEOL, hybrid bonding, thermal interface material, foundation models for physics

Format: PDF

Audience: Semiconductor packaging teams, thermal engineers, simulation engineers, materials teams, 3D IC design teams, and engineering leaders


This paper reflects Vinci’s ongoing research into how foundation models for physics can support deterministic,solver-accurate thermal analysis for advanced semiconductor package design.


Related Reading

Authors:

Hardik Kabaria

Founder & Chief Executive Officer

Dr. Hardik Kabaria is Founder and Chief Executive Officer of Vinci. His work in computational geometry, physics simulation, and AI underpins the company’s approach to deterministic, solver-accurate systems for engineering and the physical world.

Sheik Dawood Beer Mohideen

John L. Davenport

Balaji Cherukuri

Joseph G. Kocheemoolayil

Nimish Patil

Sarah Osentoski

Co-Founder & Chief Technology Officer

Dr. Sarah Osentoski is Co-Founder and Chief Technology Officer at Vinci. A leader in machine learning and autonomous systems, she directs Vinci’s technical work at the intersection of AI, physics, and production engineering.

Adrian J. Lew